2.3. Special function registers (SFR) for 8051 microcontrollers
The registration area or special functions (SFR) is between 80H and FFH address the internal memory of the microcontroller.
This memory area can not be used as data memory, it is clear that if we write out of control in the memory allocated to a special register, modify the behavior of the microcontroller, resulting in unexpected results as the affected record. Although the memory locations that are not assigned to a special register can be used to hold data, it is not advisable to use, it has to bear in mind that these may be reserved and assigned to special registers in other models or manufacturers of microcontrollers and our program will conflict when changing model.
The input and output ports also occupy a specific position or memory addresses. The memory locations on the left side (80h, 88h, 90H ..) are reserved for routing bit so that the concerned records may be accessed via this system.
The following table shows the layout of each record in 8051 and 8052 microcontroller.
| F8H | | | | | | | | | FFH |
| F0H | B *
| | | | | | | | F7H |
| E8H | | | | | | | | | EFH |
| E0h | ACC *
| | | | | | | | E7H |
| D8H | | | | | | | | | DFH |
| D0H | PSW *
| | | | | | | | D7H |
| C8H | T2CON * #
| | RCAP2L #
| RCAP2H #
| TL2 #
| TH2 #
| | | CFH |
| C0h | | | | | | | | | C7H |
| B8H | IP *
| | | | | | | | BFH |
| B0h | P3 *
| | | | | | | | B7H |
| A8h | IE *
| | | | | | | | AFH |
| A0H | P2 *
| | | | | | | | A7H |
| 98H | SCON *
| SBUF | | | | | | | 9FH |
| 90H | P1 *
| | | | | | | | 97H |
| 88h | TCON *
| TMOD | TL0 | TL1 | TH0 | TH1 | | | 8FH |
| 80H | P0 *
| SP | DPL | DPH | | | | PCON | 87H |
The following table shows the description and the symbols of each bit or pin of the internal registers (SFR) of the 8051/8052 microcontroller family.
| Register | Description | Address | Command bit or alternate function port | Reset value |
| | | MSB | | | | | | | LSB | |
| ACC * | Accumulator
(Accumulator) | E0h | E7 | E6 | E5 | E4 | E3 | E2 | E1 | E0 | 00H |
| B * | Register B
(Register B) | F0H | F7 | F6 | F5 | F4 | F3 | F2 | F1 | F0 | 00H |
| DPTR: | Data Pointer
(Data Pointer) (2 bytes) | | | | | | | | | | |
| DPH | High byte of DPTR
(Data pointer high) | 83H | | | | | | | | | 00H |
| DPL | Low byte of DPTR
(Data pointer low) | 82H | | | | | | | | | 00H |
| | | AF | AE | AD | AC | AB | AA | A9 | A8 | |
| IE * | Enable interrupts
(Interrupt enable) | A8h | EA | - | ET2 | ES | ET1 | EX1 | ET0 | EX0 | 0x000000B |
| | | BF | BE | BD | BC | BB | BA | B9 | B8 | |
| IP * | Priority interrupts
(Interrupt priority) | B8H | - | - | PT2 | PS | PT1 | PX1 | PT0 | PX0 | 0x000000B |
| | | 87 | 86 | 85 | 84 | 83 | 82 | 81 | 80 | |
| P0 * | Port 0 (Port 0) | 80H | AD7 | AD6 | AD5 | AD4 | AD3 | AD2 | AD1 | AD0 | FFH |
| | | 97 | 96 | 95 | 94 | 93 | 92 | 91 | 90 | |
| P1 * | Port 1 (Port 1) | 90H | - | - | - | - | - | - | T2EX | T2 | FFH |
| | | A7 | A6 | A5 | A4 | A3 | A2 | A1 | A0 | |
| P2 * | Port 2 (Port 2) | A0H | A15 | A14 | A13 | A12 | A11 | A10 | A9 | A8 | FFH |
| | | B7 | B6 | B5 | B4 | B3 | B2 | B1 | B0 | |
| P3 * | Port 3 (Port 3) | B0h | RD | WR | T1 | T0 | INT1 | INT0 | TxD | RxD | FFH |
| PCON1 | Consumption control
(Power control) | 87H | SMOD | - | - | - | GF1 | GF0 | PD | IDL | 0xxxxxxxB |
| | | D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 | |
| PSW * | Program status word
(Program status word) | D0H | CY | AC | F0 | RS1 | RS0 | OV | - | P | 00H |
| Register | Description | Address | Bit command or alternate function port | Reset value |
| | | MSB | | | | | | | LSB | |
| RCAP2H # | Capture high byte
(Capture high) | CBH | | | | | | | | | 00H |
| RCAPL # | Capture Low byte
(Capture low) | CAH | | | | | | | | | 00H |
| SBUF | Serial Data Buffer
(Serial data buffer) | 99h | | | | | | | | | xxxxxxxxB |
| | | 9F | 9E | 9D | 9C | 9B | 9A | 99 | 98 | |
| SCON * | Serial Port Control
(Serial controller) | 98H | SM0 | SM1 | SM2 | REN | TB8 | Rb8 | IT | RI | 00H |
| SP | Stack pointer
(Stack Pointer) | 81F | | | | | | | | | 07H |
| | | 8F | 8E | 8D | 8C | 8B | 8A | 89 | 88 | |
| TCON * | Control Timers
(Timer Control) | 88h | TF1 | TR1 | TF0 | TR0 | IE1 | IT1 | IE0 | IT0 | 00H |
| | | CF | CE | CD | CC | CB | CA | C9 | C8 | |
| T2CON * # | Timer 2 Control
(Timer 2 contro l) | C8H | TF2 | EXF2 | RCLK | TCLK | EXEN2 | TR2 | C/T2 | CP/RL2 | 00H |
| TH0 | Timer 0 upper
(Timer high 0) | 8CH | | | | | | | | | 00H |
| TH1 | Timer 1 upper
(Timer high 1) | 8DH | | | | | | | | | 00H |
| TH2 # | Timer 2 top
(Timer high 2) | CDH | | | | | | | | | 00H |
| TL0 | Timer 0 lower
(Timer Low 0) | 8AH | | | | | | | | | 00H |
| TL1 | Timer 1 lower
(Timer Low 1) | 8BH | | | | | | | | | 00H |
| TL2 # | Timer 2 lower
(Timer Low 2) | CCH | | | | | | | | | 00H |
| TMOD | Timers Mode
(Timer mode) | 89h | GATE | C / T | M1 | M0 | GATE | C / T | M1 | M0 | 00H |
* Register with bit-level addressing.
# Records added in the 8052 microcontroller family.
